# Third-party material

TODO: tilcayo's own code does not have a licence yet.

What the repository carries, fetches or uses, and the licence its upstream
states in LICENSE/COPYING files and file headers at the recorded commits
(checked 2026-10-05). Not legal advice. Details:
`issue-tracking/reports/150-third-party-licenses.md`.

## Linked into `tcy`

| what | upstream | licence | licence text |
|------|----------|---------|--------------|
| CaDiCaL, the SAT solver | https://github.com/arminbiere/cadical `rel-3.0.1`: by default a system install's static library (nixpkgs' `cadical` in the dev shell and the flake package); with `-Ddeps=source`, the tarball pinned in `build.zig.zon` (and `flake.nix`), compiled (`src/*.cpp` but `cadical.cpp` and `mobical.cpp`; `src/kitten.c`). Not carried | MIT (its notice goes with every `tcy` binary) | `src/cadical.LICENSE` |
| sv-elab, the SystemVerilog elaborator of `tcy import-sv` | https://github.com/widlarizer/sv-elab, a commit of its `tilcayo` branch pinned in `build.zig.zon`, compiled in every configuration. Not carried. The branch forks https://github.com/povik/sv-elab; an AI agent wrote its commits for tilcayo, so sv-elab's AI policy keeps them out of upstream | ISC (Martin Povišer) | `test/sv/Inputs/sv-elab/LICENSE` |
| sv-elab's `third_party/hashlib` | included by sv-elab's sources | public domain (Claire Xenia Wolf) | its file header |
| slang, the SystemVerilog compiler under sv-elab | https://github.com/MikePopoloski/slang `v12.0`: by default the prebuilt static library (nixpkgs' `sv-lang` at that tag, in the dev shell and the flake package); with `-Ddeps=source`, the tarball pinned in `build.zig.zon`, compiled. Not carried | MIT (Michael Popoloski); its vendored `boost_unordered.hpp`, `boost_concurrent.hpp` and `expected.hpp` BSL-1.0, `BS_thread_pool.hpp` MIT (per its `REUSE.toml`) | slang's `LICENSE` and `LICENSES/` (not carried) |
| {fmt} | https://github.com/fmtlib/fmt `12.2.0`, compiled into slang (`-Ddeps=source`, or the prebuilt slang's build) | MIT | {fmt}'s `LICENSE` (not carried) |
| boost.regex | https://github.com/MikePopoloski/regex `boost-1.91.0`, header-only, compiled into slang | BSL-1.0 | its `LICENSE_1_0.txt` (not carried) |
| toml++ | https://github.com/marzer/tomlplusplus `v3.4.0`, header-only, compiled into slang | MIT | its `LICENSE` (not carried) |
| libstdc++ and libgcc_eh (default configuration only) | GCC, the C++ compiler's own static runtime, linked into `tcy` | GPL-3.0-or-later with the GCC Runtime Library Exception 3.1 | GCC's `COPYING3` and `COPYING.RUNTIME` (not carried) |
| libc++, libc++abi and libunwind (`-Ddeps=source`; `tcy.wasm` also compiles parts of them into itself, build.md "WebAssembly") | LLVM, the sources Zig 0.16 ships in its `lib/` and compiles | Apache-2.0 WITH LLVM-exception (file headers) | `LICENSE.TXT` in Zig's `lib/libcxx`, `lib/libcxxabi`, `lib/libunwind` (not carried) |
| wasi-libc (`tcy.wasm` only) | the wasi-libc Zig 0.16 ships in `lib/libc/wasi`, with its emulated process clocks and `getpid` | Apache-2.0 WITH LLVM-exception, Apache-2.0 or MIT; its parts dlmalloc CC0, cloudlibc BSD-2-Clause, musl MIT | Zig's `lib/libc/wasi/LICENSE*` (not carried) |

## Carried in the repository

| path | upstream (commit) | licence | licence text |
|------|-------------------|---------|--------------|
| `test/yosys/Inputs/tt_um_atx_phased_interferometer.v` (also bench `interferometer`) | https://github.com/atx/tt-acoustic-interferometer (`6eb27404986c`), verbatim | Apache-2.0 | `tt_um_atx_phased_interferometer.LICENSE`, `.NOTICE` |
| `tools/bench/designs/murax/Murax.v` | VexRiscv Murax, https://github.com/ekliptik/VexRiscv (`00534dc4a84e`), SpinalHDL 1.9.4 output | MIT | `murax/LICENSE` |
| `tools/bench/designs/spinal-usb-ohci/UsbOhciWishbone.v` | SpinalHDL lib, https://github.com/SpinalHDL/SpinalHDL (`270018552577`, v1.9.4), generated | MIT (lib; the core, not carried, is LGPL-3.0) | `spinal-usb-ohci/LICENSE`, `NOTICE` |
| `tools/bench/designs/spinal-tilelink-cache/Cache.v` | SpinalHDL lib, same commit, generated (`Gen.scala` is ours) | MIT (lib; core LGPL-3.0, not carried) | `spinal-tilelink-cache/LICENSE`, `NOTICE` |
| `tools/bench/designs/chisel-gemmini-execute/execute_controller.sv.gz` | Gemmini (https://github.com/ucb-bar/gemmini) FIRRTL via https://github.com/opencompl/circt-sfc-experiments (`f683410ce27c`), firtool 1.103 output | BSD-3-Clause | `chisel-gemmini-execute/LICENSE`, `NOTICE` |
| `src/ext/liberty/testdata/sky130_seq.lib` | SkyWater SKY130 `sky130_fd_sc_hd__tt_025C_1v80.lib`, https://github.com/google/skywater-pdk-libs-sky130_fd_sc_hd (`ac7fb61f06e6`), modified: excerpt of 16 sequential cells | Apache-2.0 | `sky130_seq.LICENSE` |
| `test/sv/Inputs/sv-elab/*.sv` | sv-elab's unit test inputs, https://github.com/povik/sv-elab (`3e152133b9c2`) `tests/unit/`, verbatim: `complex_lhs`, `field`, `foreach`, `init`, `modport`, `port_conn`, `port_sext`, `static_element_select` | ISC (Martin Povišer) | `test/sv/Inputs/sv-elab/LICENSE` |
| `test/ice40/Inputs/xtea.v` (also bench `xtea`, fetched) | VTR (`a3e60c31bb43`), `vtr_flow/benchmarks/freecores/xtea.v`, verbatim | LGPL-2.1-or-later (file header, Copyright (C) 2006 David Johnson) | `test/ice40/Inputs/xtea.LICENSE` |
| `test/abc/Inputs/abc_speed_gia_only.script` | OpenROAD-flow-scripts (`3dc3b3b47cb7`), `flow/scripts/abc_speed_gia_only.script`, plus one origin comment line | BSD-3-Clause | `abc_speed_gia_only.LICENSE` |

Everything else under `test/**/Inputs/`, `src/ext/*/testdata/` and
`tools/yosys/` is hand-written or generated from our own designs.

## Fetched at a commit, not carried

`tools/bench/compare.py` fetches these into `$TCY_BENCH_CACHE`. Upstreams: ORFS =
https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts
(`8c0616910615`); VTR = https://github.com/verilog-to-routing/vtr-verilog-to-routing
(`a3e60c31bb43`); EPFL = https://github.com/lsils/benchmarks (`42c1f31b9fdd`).
The carried designs (`murax`, `spinal-*`, `chisel-gemmini-execute`,
`interferometer`) are in the table above.

| design | upstream | licence |
|--------|----------|---------|
| `aes` | ORFS `aes` | BSD-3-Clause (ASICs World Services `LICENSE`); headers carry an OpenCores notice |
| `blob-merge` | VTR `blob_merge.v` | unspecified |
| `coralnpu` | ORFS `coralnpu` | Apache-2.0 AND SHL-0.51 (`fakeram_*.sv` no header) |
| `croc` | https://github.com/pulp-platform/croc (`b44242be749d`), with its `ihp13/pdk` submodule, the IHP Open PDK (https://github.com/IHP-GmbH/IHP-Open-PDK, `035037f63128`), whose `sg13g2` liberty files the `ihp` variant reads and `croc-ihp` maps to | SHL-0.51 AND Apache-2.0 AND LGPL-2.1-or-later; the PDK Apache-2.0 |
| `cva6` | ORFS `cva6` | SHL-0.51 AND Apache-2.0 WITH SHL-2.0 AND Apache-2.0 WITH SHL-2.1 (`fakeram7_*.sv` no header) |
| `dynamic-node` | ORFS `dynamic_node` | BSD-3-Clause |
| `enet-core` | VTR `ultraembedded/enet_core.v` | Apache-2.0 |
| `epfl-hyp`, `epfl-mem-ctrl`, `epfl-multiplier`, `epfl-sin`, `epfl-voter` | EPFL | MIT |
| `ethmac` | ORFS `ethmac` | LGPL-2.1-or-later |
| `fazyrv` | https://github.com/meiniKi/FazyRV (`4aaf2436f5f9`) `rtl/` | MIT |
| `ibex` | ORFS `ibex_sv` | Apache-2.0 |
| `jpeg` | ORFS `jpeg` | BSD-3-Clause (ASICs World Services `LICENSE`); headers carry an OpenCores notice |
| `lenet` | VTR `koios/lenet.v` | MIT (Koios README); HLS sections say Xilinx "All Rights Reserved" |
| `md5` | VTR `Md5Core.v` | GPL-3.0-or-later |
| `megaboom` | https://github.com/The-OpenROAD-Project/megaboom (`c4a424ba7ca0`) | BSD-3-Clause |
| `mempool-group` | ORFS `mempool_group` | SHL-0.51 |
| `microwatt` | ORFS `microwatt` | CC-BY-4.0 AND LGPL-2.1-or-later |
| `mkdelayworker32b` | VTR `mkDelayWorker32B.v`, `primitives.v` | unspecified (Bluespec part); `generic_fifo_sc_*` carry an OpenCores notice |
| `mmc-core` | VTR `ultraembedded/mmc_core.v` | Apache-2.0 |
| `mock-cpu-fifo` | ORFS `fifo` | unspecified |
| `stereovision0` | VTR `stereovision0.v` | unspecified |
| `swerv` | ORFS `swerv`, nangate45 `cells_clkgate.v` | Apache-2.0 |
| `tdarknet-like-large` | VTR `koios/tdarknet_like.large.v` | MIT (Koios README); HLS sections say Xilinx "All Rights Reserved" |
| `tt-ay8913` | https://github.com/rejunity/tt05-psg-ay8913 (`7e30c9acfa72`) `src/` | Apache-2.0 |
| `usb-uart-core` | VTR `ultraembedded/usb_uart_core.v` | LGPL-2.1-or-later |
| `xtea` | VTR `freecores/xtea.v` | LGPL-2.1-or-later (file header, Copyright (C) 2006 David Johnson) |

## Tools the dev shell pulls in

Not redistributed; each under its own upstream licence: Yosys (ISC), ABC
(UC permission notice; Yosys's, which the flake also builds as
`yosys-abc.wasm`), nextpnr and IceStorm (ISC), Zig, Python lit and filecheck, wasmtime and wasmtime-py
(Apache-2.0 WITH LLVM-exception), Node.js, JDK 21 (all from nixpkgs); the sky130 `.lib` of `TCY_SKY130_LIB` from ORFS
(`b5dceb3c0839`; Apache-2.0 per the SkyWater repository); ELK 0.12.0 jars
and elkjs 0.12.0 (EPL-2.0 OR GPL-3.0-or-later, with EMF, Guava, Gson, Xtext,
Xtend under their POM licences); deck.gl 9.4.0 (MIT). The tutorial pages
link Google Fonts (IBM Plex Mono, Source Serif 4).
`zig build web` writes the browser page with `tcy.wasm` and copies of deck.gl, elkjs and `yosys-abc.wasm` (build.md, "WebAssembly"); publishing it redistributes them, and also `xtea.v` as an example and the sky130 `.lib` of `TCY_SKY130_LIB`, modified (`tools/wasm/trim_liberty.py`: the smallest drive strength of each cell, without power tables; the file says so at its top). The page carries this file and, under `licenses/` with the `index.html` its "Licences" link opens, the texts the packages carry (below), deck.gl's `LICENSE`, elkjs's `LICENSE.md`, `xtea.LICENSE` and the Apache-2.0 text of sky130_fd_sc_hd (`sky130_seq.LICENSE`).
`zig build packages` writes the npm and PyPI packages `tilcayo` (build.md, "Packages"). They redistribute `tcy.wasm`, which holds what "Linked into `tcy`" lists for `-Ddeps=source` and `tcy.wasm`, and `yosys-abc.wasm`: ABC with the components of its tree, libc++ and wasi-libc. Each package carries this file and, under `licenses/`, ABC's `copyright.txt` and the licence file of each component of its tree, those of the pinned dependencies (boost.regex's BSL-1.0 is slang's `LICENSES/BSL-1.0.txt`; hashlib is public domain) and those in Zig's `lib/` for libc++, libc++abi, libunwind and wasi-libc with its parts.

## Notes

The maintainer reviewed these on 2026-10-05 and found no action needed.

- No licence found: `blob-merge`, `stereovision0`, `mock-cpu-fifo`, the
  Bluespec part of `mkdelayworker32b`, the `fakeram*.sv` files of
  `coralnpu`, `cva6` and `mempool-group`.
- Mixed or conflicting: `aes`, `jpeg` (ORFS `LICENSE` vs OpenCores
  headers), `lenet`, `tdarknet-like-large` (Koios README vs Xilinx
  headers), `coralnpu`, `croc`, `cva6`, `microwatt`.
- Restrictive pre-release header in `lzc.sv`: `cva6`, `mempool-group`,
  `coralnpu`. Later published under Solderpad.
- Copyleft (GPL, LGPL, CC-BY) designs are inputs that `tcy` reads, not
  linked or distributed.
- `megaboom`'s `plusarg_reader.v` cites a missing `LICENSE.SiFive`.
- Read at upstream master, not the used commit: `microwatt`,
  `chisel-gemmini-execute` (its FIRRTL source repository has no licence).
- ORFS `sky130hd` has no licence file; EPFL's MIT names no holder.